1. Field of the Invention
The present invention relates to an exposure method and an apparatus therefor.
2. Description of the Related Art
Generally, a lithographic process, which is one of the manufacturing processes of a semiconductor device, can be mainly divided into five steps, i.e., surface treatment, resist coating, exposure, development, and etching. A projection type exposure apparatus used in these steps and a vacuum generator for etching or the like employ mechanical systems for clamping the periphery of wafer to convey a semiconductor wafer or fix it to a treatment table. However, if an after-treatment is insufficient in the resist coating process, a resist may remain on a peripheral portion of a semiconductor wafer. In such a case, when the semiconductor wafer is conveyed, resist peeling tends to occur, and hence contaminants are generated.
As means for preventing generation of such contaminants, Japanese Patent Publication No. 53-37706, Japanese Patent Disclosure (Kokai) Nos. 55-12750, 58-58731, and 58-191434, Japanese Utility Model Disclosure (Kokai) Nos. 60-94660 and 61-111151, and Japanese Patent Disclosure (Kokai) Nos. 61-121333 and 61-184824 disclose a side rinse process, or Japanese Patent Disclosure (Kokai) No. 58-200537, Japanese Utility Model Disclosure (Kokai) Nos. 58-81932 and 59-67930, and Japanese Patent Disclosure (Kokai) Nos. 60-110118, 60-121719, 60-18993, and 61-239625 disclose back side cleaning. According to these means, after resist coating is finished, a solvent is sprayed on a peripheral portion of a wafer, thereby removing resist and the like from the peripheral portion.
The above side rinse process or back side cleaning is performed while a wafer is rotated. For this reason, a treatment such as a side rinse cannot be selectively performed for an orientation flat. For this reason, when a resist n the orientation flat is to be removed, an entire area of resist removal must be increased. Therefore, the number of semiconductor chips which can be simultaneously manufactured is decreased, and hence the product yield is decreased. In addition, the resist left on a boundary portion upon removal of the resist is swollen. For this reason, in an apparatus adopting a system of focusing a plurality of points outside an exposure area, defocus may occur. In order to process an orientation flat and the like in the same manner as a peripheral portion, a method has been developed, wherein a porous member containing a solvent which is disclosed in, e.g., Japanese Patent Disclosure (Kokai) Nos. 59-117123 and 61-219135, is brought into contact with the periphery of a semiconductor wafer. However, these means cannot solve the problems such as defocus.
In addition, Japanese Patent Disclosure (Kokai) Nos. 58-159535 and 61-73330, Japanese Utility Model Disclosure (Kokai) No. 60-94661, and the like disclose a method of using exposure means for removing resist layer on a peripheral portion of a semiconductor wafer in an annular form, as a means of solving the problem of defocus. According this method, however, the problem of resist removal from an orientation flat still remains unsolved.
A cam method may be available for solving the problems of resist removal from an orientation flat and of defocus. According to this method, a wafer is positioned on a chuck having a cam of a shape identical to that of a semiconductor wafer arranged on its rotary shaft, and is chucked thereto. Then, the wafer is rotated while exposure light guided by an optical fiber or the like traces the cam. With this arrangement, a peripheral portion of the wafer is exposed. This method requires a cam having a shape matched with that of a wafer. In addition, cams must be exchanged depending on the type of wafer. This interferes with factory automation (FA). Moreover, contaminants may be generated due to wear of a cam. That is, contaminants other than resists may be generated.